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au optronics corporation product specification document version 1.0 1 numpages 29 m240hw01 v2 ( ) preliminary specification (v ) final specification module 24.0 color tft-lcd model name m240hw01 v2 customer date approved by note: this specification is subject to change without notice. approved by date sean chen 2009/5/5 prepared by hannie yeh 2009/5/5 desktop display business group / au optronics corporation auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 2 numpages 29 m240hw01 v2 contents 1.0 handling precautions........................... ................................................... ........4 2.0 general description ............................ ................................................... .........5 2.1 display characteristics ............................ ................................................... ....................... 5 2.2 optical characteristics............................ ................................................... ........................ 6 3.0 functional block diagram ....................... ................................................... ..10 4.0 absolute maximum ratings....................... ................................................... 11 4.1 tft lcd module ................................. ................................................... ..........................11 4.2 backlight unit................................... ................................................... ..............................11 4.3 absolute ratings of environment ................... ................................................... ...............11 5.0 electrical characteristics ..................... ................................................... ......12 5.1 tft lcd module ................................. ................................................... ......................... 12 5.1.1 power specification ............................. ................................................... ................... 12 5.1.2 signal electrical characteristics ................ ................................................... ............. 13 5.2 backlight unit................................... ................................................... ............................. 14 6.0 signal characteristic.......................... ................................................... ........16 6.1 pixel format image ............................. ................................................... ......................... 16 6.2 the input data format ........................... ................................................... ........................ 16 6.3 signal description............................... ................................................... .......................... 17 6.4 timing characteristics ............................ ................................................... ...................... 18 6.5 timing diagram ................................. ................................................... ............................ 19 6.6 power on/off sequence............................ ................................................... ................ 20 7.0 connector & pin assignment ..................... ..................................................2 1 7.1 tft lcd module ................................. ................................................... ......................... 21 7.1.1 pin assignment................................ ................................................... ....................... 21 7.2 backlight unit................................... ................................................... ............................. 22 7.2.1 signal for lamp connector...................... ................................................... ................ 22 8.0 reliability test ............................... ................................................... .............23 9.0 shipping label................................. ................................................... ...........24 10.0 mechanical characteristics .................... ................................................... .25 auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 3 numpages 29 m240hw01 v2 record of revision version and date page old description new description remark 0.1 2009/3/31 all first edition for customer n/a 0.2 2009/4/1 6 weight 2860 (typ.) weight 2755 (ty p.) 7 contrast ratio min 700:1 contrast ratio min 600: 1 7 raising time (trr) 3.4 (typ.) / 7.4 (max.) 3.5 (typ.) / 7.5 (max.) 7 falling time (trf) 1.6 (typ.) / 2.6 (max.) 1.5 (typ.) / 2.5 (max.)- 12 n/a add input current & vdd power 25/26/ 27 n/a add me drawing 0.3 2009/4/21 12 vddrp max. 100mv vddrp max. 300m v 1.0 2009/5/5 19 modify timing diagram finalized auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 4 numpages 29 m240hw01 v2 1.0 handling precautions 1) since front polarizer is easily damaged, pay attenti on not to scratch it. 2) be sure to turn off power supply when inserting or discon necting from input connector. 3) wipe off water drop immediately. long contact with wate r may cause discoloration or spots. 4) when the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. 5) since the panel is made of glass, it may break or crack i f dropped or bumped on hard surface. 6) since cmos lsi is used in this module, take care of stat ic electricity and insure human earth when handling. 7) do not open or modify the module assembly. 8) do not press the reflector sheet at the back of the modu le to any directions. 9) in case if a module has to be put back into the packing container slot after once it was taken out from the container, do not press the center of the cc fl reflector edge. instead, press at the far ends of the ccfl reflector edge softly. otherwise th e tft module may be damaged. 10) at the insertion or removal of the signal interface connector, be sure not to rotate nor tilt the interface connector of the tft module. 11) after installation of the tft module into an enclosu re, do not twist nor bend the tft module even momentary. at designing the enclosure, it should b e taken into consideration that no bending/twisting forces are applied to the tft module fro m outside. otherwise the tft module may be damaged. 12) cold cathode fluorescent lamp in lcd contains a small amount of mercury. please follow local ordinances or regulations for disposal. 13) small amount of materials having no flammability g rade is used in the lcd module. the lcd module should be supplied by power complied with require ments of limited power source (iec60950 or ul1950), or be applied exemption. 14) the lcd module is designed so that the ccfl in it is supplied by limited current circuit (iec60950 or ul1950). do not connect the ccfl in haza rdous voltage circuit. auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 5 numpages 29 m240hw01 v2 2.0 general description this specification applies to the 24 inch-wide colo r a-si tft-lcd module m240hw01.the display supports the full hd - 1920(h) x 1080(v) screen format and 16.7m colors (rgb 6-bits + hi-frc data). all input signals are 2-channel lvds int erface and this module doesnt contain an inverter board for backlight. 2.1 display characteristics the following items are characteristics summary on the table under 25 condition: items unit specifications screen diagonal [mm] 609.7(24.0) active area [mm] 531.36 (h) x 298.89 (v) pixels h x v 1920(x3) x 1080 pixel pitch [um] 276.75 (per one triad) 276.75 pixel arrangement r.g.b. vertical stripe display mode tn mode, normally white white luminance ( center ) [cd/m 2 ] 300 cd/m 2 (typ.) contrast ratio 1000 (typ.) optical response time [msec] 5ms (typ., on/off) nominal input voltage vdd [volt] +5.0 v power consumption (vdd line + ccfl line) [watt] 35 w (typ.) (without inverter, all black pattern) weight [g] 2755 (typ.) physical size [mm] 556.0 (w) x 323.2 (h) x 16.35 (d) typ electrical interface dual channel lvds support color 16.7m colors (rgb 6-bit + hi_frc ) surface treatment anti-glare, 3h temperature range operating storage (shipping) [ o c] [ o c] 0 to +50 -20 to +60 rohs compliance rohs compliance auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 6 numpages 29 m240hw01 v2 2.2 optical characteristics the optical characteristics are measured under stable condit ions at 25 : item unit conditions min. typ. max. note horizontal (right) cr = 10 (left) 150 170 - - viewing angle [degree] vertical (up) cr = 10 (down) 140 160 - - 2 contrast ratio normal direction 600 1000 - 3 raising time (t rr ) - 3.5 7.5 falling time (t rf ) - 1.5 2.5 response time [msec] raising + falling - 5 10 4 red x 0.619 0.649 0.679 red y 0.308 0.338 0.368 green x 0.259 0.289 0.319 green y 0.579 0.609 0.639 blue x 0.116 0.146 0.176 color / chromaticity coordinates (cie) blue y 0.040 0.070 0.100 white x 0.283 0.313 0.343 color coordinates (cie) white white y 0.299 0.329 0.359 5 central luminance [cd/m 2 ] 250 300 - 6 luminance uniformity [%] 75 80 - 7 crosstalk (in 60hz) [%] 1.5 8 flicker db -20 9 auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 7 numpages 29 m240hw01 v2 note 1: measurement method the lcd module should be stabilized at given temperat ure for 30 minutes to avoid abrupt temperature change during measuring (at surface 35 ) . in order to stabilize the luminance, the measurement should be executed after lighting backlight fo r 30 minutes in a stable, windless and dark room. note 2: definition of viewing angle measured by eldim (ezcontrast 88) viewing angle is the measurement of contrast ratio R 10, at the screen center, over a 180 horizontal and 180 vertical range (off-normal view ing angles). the 180 viewing angle range is broken down as follows; 90 () horizontal left and right and 90 () vertical, high (up) and low (down). the measurement direction is typically perp endicular to the display surface with the screen rotated about its center to develop the desi red measurement viewing angle. center of the screen tft - lcd module measured distance photo detector lcd panel auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 8 numpages 29 m240hw01 v2 note 3: contrast ratio is measured by topcon sr-3 note 4: definition of response time measured by westar trd-100a the output signals of photo detector are measured when th e input signals are changed from full black to full white (rising time, tr r ), and from full white to full black (falling time, tf f ), respectively. the response time is interval between the 1 0% and 90% (1 frame at 60 hz) of amplitudes. tr r + tf f = 5 msec (typ.). note 5: color chromaticity and coordinates (cie) is measured by topcon sr-3 note 6 : central luminance is measured by topcon sr-3 note 7: luminance uniformity of these 9 points is defined as below and measured by topcon sr-3 9) - (1 points 9 in luminance maximum 9) - (1 points 9 in luminance minimum uniformity = note 8: crosstalk is defined as below and measured by topcon sr-3 100 90 10 0 % optical response white tr f tr r 100 10 0 % optical response white black tr f tr r black 1 frame 1 frame auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 9 numpages 29 m240hw01 v2 ct = | yb C ya | / ya 100 (%) where ya = luminance of measured location without gray level 0 pattern (cd/m2) yb = luminance of measured location with gray level 0 pa ttern (cd/m2) note 9: test patern: subchecker pattern measured by topcon sr-3 r g b r g b r g b r g b r g b r g b method: record dbv & dc value with trd-100 level dc hz) 30 level(at ac log 20 (db) flicker = gray level = l127 gray level = l0 amplitude time dc ac auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 10 numpages 29 m240hw01 v2 3.0 functional block diagram the following diagram shows the functional block of the 24.0 inch color tft-lcd module: i/f pcb interface: jae fi-xb30ssl-hf15 stm msbkt2407p30hb mating type: fi-x30hl (locked type) lvds auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 11 numpages 29 m240hw01 v2 4.0 absolute maximum ratings absolute maximum ratings of the module are as following: 4.1 tft lcd module 4.2 backlight unit item symbol min max unit conditions ccfl current icfl 3.0 8.0 [ma] rms note 1,2 4.3 absolute ratings of environment item symbol min. max. unit conditions operating temperature top 0 +50 [ o c] operation humidity hop 5 90 [%rh] storage temperature tst -20 +60 [ o c] storage humidity hst 5 90 [%rh] note 3 note 1: with in ta (25 ) note 2: permanent damage to the device may occur if exceeding ma ximum values note 3: for quality perfermance, please refer to auo iis(incomin g inspection standard). operating range storage range item symbol min max unit conditions logic/lcd drive voltage vdd 0 6.0 [volt] note 1,2 auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 12 numpages 29 m240hw01 v2 5.0 electrical characteristics 5.1 tft lcd module 5.1.1 power specification input power specifications are as following: note 1 : measurement conditions: the duration of rising time of power input is 470 us. +5.0v +12.0v vcc r147k r21k vr1 47k sw1 sw mag-spst 1 2 f1 q3 ao6402 g d2 s d1 d5 d6 c11uf/16v q3ao6402 g d2 s d1 d5 d6 c30.01uf/25v c21uf/25v (high to low)control signal (lcd module input) symbol parameter min typ max unit conditions vdd logic/lcd drive voltage 4.5 5.0 5.5 [volt] +/-10% idd1 input current - 0.6 1.2 [a] vdd= 5.0v,all black pattern, at 60hz pdd1 vdd power - 3 6 [watt] vdd= 5.0v,a ll black pattern, at 60hz irush inrush current - - 3 [a] note 1 vddrp allowable logic/lcd drive ripple voltage - - 300 [mv] p-p vdd= 5.0v, all black pattern at 75hz auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 13 numpages 29 m240hw01 v2 5.1.2 signal electrical characteristics input signals shall be low or hi-z state when vdd is off. p lease refer to specifications of sn75lvds82dgg (texas instruments) in detail. characteristics of each signal are as following: symbol parameter min typ max units condition vth differential input high threshold - +50 +100 [mv] vicm = 1.2v note 1 vtl differential input low threshold -100 -50 - [mv] vicm = 1.2v note 1 vid input differential voltage 100 - 600 [mv] note 1 vicm differential input common mode voltage +1.0 +1.2 +1.5 [v] vth-vtl = 200mv (max) note 1 note 1: lvds signal waveform auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 14 numpages 29 m240hw01 v2 5.2 backlight unit parameter guideline for ccfl inverter is under stable conditions at 25 ( r o o m t e m p e r a t u r e ) : parameter min. typ. max. unit note ccfl standard current (iscfl) 7.0 7.5 8.0 [ma] rms ccfl operation current (ircfl) 3.0 7.5 8.0 [ma] rms 2 ccfl frequency (fcfl) 40 53 60 [khz] 3, 4 ccfl ignition voltage (vicfl, t a = 0 ) 2000 - - [volt] rms ccfl ignition voltage (vicf, ta= 25 ) 1850 - - [volt] rms 5 ccfl operation voltage (vcfl) - 900 (@7.5ma) - [volt] rms ccfl power consumption (pcfl) - 27 - [watt] 6 ccfl life time (ltcfl) 40,000 50,000 - [hour] 7 note 1: typ. values are auo recommended design values. *1 all of characteristics listed are measured under the cond ition using the auo test inverter. *2 it is recommended to check the inverter carefully. some times, interfering noise stripes appear on the screen, and substandard luminance or flicker at low power may happen. *3 while designing an inverter, it is suggested to check sa fety circuit very carefully. impedance of ccfl, for instance, becomes more than 1 [m ohm] when cc fl is damaged. *4 generally, ccfl has certain delay time after applyi ng kick-off voltage. it is recommended to keep on applying kick-off voltage for 1 [sec] until discharge . *5 reducing ccfl current will increase ccfl discharge volt age and generally increases ccfl discharge frequency. so all the parameters of the inverte r should be carefully designed so the inverter will not produce too much leakage current fr om high-voltage output. *6 both ccfls in the ccfl set (2 ccfl lamps on each side of a panel) is designed for identical phase driving. reversed phase driving of ccfl set is not encouraged. *7 for designing ccfl current, it is highly recommanded to use symmetric and consistent sinusoidal wave for each ccfl input current with asymmetric ration of 10% or less in both postive area and negative area (ie. 0.9* 2*i rms < i 1 & i 2 < 1.1* 2*i rms ) as refer to the following diagram, otherwise proper ccfl functionality can not be guarantied. auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 15 numpages 29 m240hw01 v2 note 2: ccfl standard current is measured at 25 2 . note 3: ccfl discharge frequency should be carefully determined t o avoid interference between inverter and tft lcd. note 4: the frequency range will not affect lamp life and reliabi lity characteristics. note 5: ccfl inverter should be able to release power that ha s generating capacity exceeding 2000 volt. lamp units need minimum voltage, 2000 vol t, for ignition. note 6: the variance of ccfl power consumption is 10%. (ircfl vcfl 4 = pcfl) note 7: definition of life time: brightness becomes 50%. the minim um life time of ccfl unit is on the condition of 7.5ma ccfl current and 25 2 . auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 16 numpages 29 m240hw01 v2 6.0 signal characteristic 6.1 pixel format image following figure shows the relationship of the input signal s and lcd pixel format. r g b r g b r g b r g b r g b r g b r g b r g b 1 2 1 919 1 920 1st line 1080 line 6.2 the input data format note 1: r/g/b data 7:msb, r/g/b data 0:lsb o = odd pixel data e = even pixel data auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 17 numpages 29 m240hw01 v2 6.3 signal description the module using one lvds receiver sn75lvds82(texas in struments). lvds is a differential signal technology for lcd interface and high speed data transfer device. lvds transmitters shall be sn75lvds83(negative edge sampling ). the first lvds port(rxoxxx) transmits odd pixels while the second lvds port(rxexxx) t ransmits even pixels. pin # signal name description 1 rxo in 0 - negative lvds differential data input ( odd data) 2 rxo in 0+ positive lvds differential data input (odd data) 3 rxo in 1 - negative lvds differential data input (odd data) 4 rxo in 1+ positive lvds differential data input (odd data) 5 rxo in 2 - negative lvds differential data input (odd data, dsptmg ) 6 rxo in 2+ positive lvds differential data input (odd data, dsptmg) 7 gnd power ground 8 rxoc lk - negative lvds differential clock input (odd clock) 9 rxoc lk + positive lvds differential clock input (odd clock) 10 rxo in 3 - negative lvds differential dat a input (odd data) 11 rxo in 3+ positive lvds differential data input (odd data) 12 rxe in 0 - negative lvds differential data input (even data ) 13 rxe in 0+ positive lvds differential data input (even data) 14 gnd power ground 15 rxe in 1 - positive lvds diffe rential data input (even data) 16 rxe in 1+ negative lvds differential data input (even data) 17 gnd power ground 18 rxe in 2 - negative lvds differential data input (even data) 19 rxe in 2+ positive lvds differential data input (even data) 20 rxec lk - negati ve lvds differential clock input (even clock) 21 rxec lk + positive lvds differential clock input (even clock) 22 rxe in 3 - negative lvds differential data input (even data) 23 rxe in 3+ positive lvds differential data input (even data) 24 gnd power ground 25 nc no connectio n (for auo test only . do not connect ) 26 nc no connection (for auo test only . do not connect ) 27 vdd power +5v 28 vdd power +5v 29 vdd power +5v 30 vdd power +5v auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 18 numpages 29 m240hw01 v2 note1: start from left side note2: input signals of odd and even clock shall be the same timin g. 6.4 timing characteristics basically, interface timing described here is not actual in put timing of lcd module but close to output timing of sn75lvds82dgg (texas instruments) or e quivalent. item symbol min typ max unit data clk tclk 40 75 90 [mhz] period th 1034 1060 2047 [tclk] display area tdisp(h) 960 960 960 [tclk] h-section blanking tblk(h) 74 100 1087 [tclk] period tv 1088 1120 2047 [th] display area tdisp(v) 1080 1080 1080 [th] v-section blanking tblk(v) 8 40 967 [th] frame rate f 50 60 75 [hz] note : de mode only auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 19 numpages 29 m240hw01 v2 6.5 timing diagram line line pixel 7 invalid data pixel pixel m-3 2 tdisp(h) pixel 1 pixel pixel invalid data 6 m-2 m-1 rgb data x pixel de pixel pixel clk n 3 line line 3 2 tdisp(v) pixel rgb data (odd) rgb data (even) line 8 m pixel m pixel m-4 invalid data th tv pixel n tclk pixel m-5 invalid data 4 pixel 5 invalid data 12 pixel invalid data 1 de 4 pixel 11 9 line n line tblk(h) 10 pixel pixel y tblk(v) m-1 pixel pixel m pixel m-3 m-2 pixel pixel pixel 1 4 pixel 3 pixel 2 m-4 pixel pixel m-5 m-6 pixel m-7 pixel th auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 20 numpages 29 m240hw01 v2 6.6 power on/off sequence vdd power and lamp on/off sequence are as follows. interface si gnals are also shown in the chart. signals from any system shall be hi-z state or low l evel when vdd is off. value parameter min. typ. max. unit t1 0.5 - 10 [msec] t2 0 - 15 [msec] t3 300 - - [msec] t4 200 - - [msec] t5 0 16 50 [msec] t6 - - 100 [msec] t7 1000 - - [msec] auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 21 numpages 29 m240hw01 v2 7.0 connector & pin assignment physical interface is described as for the connector on module . these connectors are capable of accommodating the following signals and will be following com ponents. 7.1 tft lcd module connector name / designation interface connector / interface card manufacturer stm jae type part number msbkt2407p30hb fi-xb30ssl-hf15 mating housing part number fi-x30hl (locked type) 7.1.1 pin assignment pin# signal name pin# signal name 1 rxoin0- 2 rxoin0+ 3 rxoin1- 4 rxoin1+ 5 rxoin2- 6 rxoin2+ 7 gnd 8 rxoclkin- 9 rxoclkin+ 10 rxoin3- 11 rxoin3+ 12 rxein0- 13 rxein0+ 14 gnd 15 rxein1- 16 rxein1+ 17 gnd 18 rxein2- 19 rxein2+ 20 rxeclkin- 21 rxeclkin+ 22 rxein3- 23 rxein3+ 24 gnd 25 nc (for auo test only. do not connect) 26 nc (for auo test only. do not connect) 27 vdd 28 vdd 29 vdd 30 vdd auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 22 numpages 29 m240hw01 v2 7.2 backlight unit physical interface is described as for the connector on module . these connectors are capable of accommodating the following signals and will be following com ponents. connector name / designation lamp connector / backlight lamp manufacturer cvilux type part number cp0502sl090 mating type part number cp0502p1ml0 7.2.1 signal for lamp connector connector no. pin no. input color function 1 hot1 pink high voltage cn1 2 cold1 white low voltage 1 hot2 blue high voltage upper cn2 2 cold2 black low voltage connector no. pin no. input color function 1 hot1 pink high voltage cn3 2 cold1 white low voltage 1 hot2 blue high voltage lower cn4 2 cold2 black low voltage auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 23 numpages 29 m240hw01 v2 8.0 reliability test environment test conditions are listed as following table. items required condition note temperature humidity bias (thb) ta= 5 0 , 80%rh, 300hours high temperature operation (hto) ta= 5 0 , 50%rh, 300hours low temperature operation (lto) ta= 0 , 3 0 0 h o u r s high temperature storage (hts) ta= 6 0 , 3 0 0 h o u r s low temperature storage (lts) ta= - 2 0 , 3 0 0 h o u r s vibration test (non-operation) acceleration: 1.5 grms wave: random frequency: 10 - 200 hz duration: 30 minutes each axis (x, y, z) shock test (non-operation) acceleration: 50 g wave: half-sine active time: 20 ms direction: x, y, z (one time for each axis) drop test height: 46 cm, package test thermal shock test (tst) -20 / 30min, 6 0 / 30min, 100 cycles 1 on/off test on/10sec, off/10sec, 30,000 cycles contact discharge: 8kv, 150pf(330? ) 1sec, 15 points, 25 times/ point. esd (electro static discharge) air discharge: 15kv, 150pf(330? ) 1sec 15 points, 25 times/ point. 2 altitude test operation:10,000 ft non-operation:30,000 ft note 1 : the tft-lcd module will not sustain damage after bein g subjected to 100 cycles of rapid temperature change. a cycle of rapid temperature change consists of varying the temperature from -2 0 to 6 0 , and back again. power is not applied during the test. after temperature cycling, the unit is placed in normal room ambient for at least 4 ho urs before power on. note 2 : en61000-4-2, esd class b: certain performance degradat ion allowed no data lost self-recoverable no hardware failures. auo confidential for lge internal use only / 2009/6/16 www..net www..net
au optronics corporation product specification document version 1.0 24 numpages 29 m240hw01 v2 9.0 shipping label the label is on the panel as shown below: note 1: for pb free products, auo will add for identification. note 2: for rohs compatible products, auo will add for identification. note 3: for china rohs compatible products, auo will add for identification. note 4: the green mark will be presented only when the green d ocuments have been ready by auo internal green team. auo confidential for lge internal use only / 2009/6/16 www..net www..net
ver 0.2 10.0 mechanical characteristics auo confidential for lge internal use only / 2009/6/16 www..net www..net
ver 0.2 auo confidential for lge internal use only / 2009/6/16 www..net www..net
ver 0.2 auo confidential for lge internal use only / 2009/6/16 www..net www..net

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